1. Field of the Invention
The invention described herein is related to specifying placement in a physical circuit medium of circuit components to generate a memory system or other repetitive circuit structure in the medium. Specifically, the invention allows graphical specification entry of circuit component placement through a graphical user interface to specify user-arranged circuit topologies in an integrated circuit design.
2. Description of the Prior Art
Memory generators are engineering design tools that allow circuit designers to configure a memory circuit for incorporation into an integrated circuit (IC) design. Modern semiconductor memories consist of highly-repetitive circuit structures consisting of millions of similar bit storage cells arranged in an array. Memory generators allow circuit designers to bypass much of the repetitive cell placement work by accepting parameters indicating the size of the array needed and automatically generating the underlying array structure accordingly.
Generally, memory generators work as a module in an engineering design automation (EDA) system for designing an application specific memory circuit, such as that depicted in FIG. 1. As is shown in the Figure, the memory block 100 includes a memory core 105 and auxiliary circuits that include row drivers 110, a row decoder circuit 115, address drivers 120, a column decoder circuit 125, control logic 130, a precharge circuit 135, sense amplifiers 140, an output stage 145 and input multiplexers 150. The functionality of the memory core and the auxiliary circuitry is well known and will not be described in detail herein. A traditional memory generator allows the designer to specify certain aspects of the memory core and many then incorporate the auxiliary memory circuits according the user-designated core size.
Memory generators presently in use are generally vendor-specific, where the vendor specifies what memory design parameters may be controlled by the end-user. The changeable parameters are usually restricted to memory width (the number of bits in a word) and depth (the number of words in the memory block). While a particular vendor may allow the user to choose a type of memory configuration, e.g., single and dual-port static random access memory (SRAM), single and dual-port register files, programmable diffusion read-only memory (ROM), these topologies are fixed by the vendor.
Memory generation can be achieved through rigorous placement procedures defined by a programming language such as SKILL. Such methods are inherently tedious in that one must first have at least a working knowledge of the programming language and then must rely on mental imagery of the placement in that such placement programming is inherently non-graphical. Further, modifications to a memory design must be made through a skilled programmer who may be other than the designer requiring the change. Additionally, as with any programmed logic, the design cycle must anticipate often lengthy debugging cycles, even when minor changes are introduced to the design.
Given the shortcomings of the present technology, the need is apparent for a circuit generator that automates repetitive component placement in accordance with a simplified specification entry of a user-designated circuit topology. Such circuit generators may be used to generate memory circuits as well as other repetitive circuit structures.